As with most portable system components, the main concern with 
mobile processors is reducing their size, power usage, and heat generation. This 
allows them to function in the tight confines of a laptop system without 
overheating, while allowing the longest possible battery life. Mobile processors 
usually differ from desktop processors in packaging and power consumption, and 
they can have special features not found in desktop processors. Some of the 
special features first debuted in mobile processors are subsequently implemented 
in desktop processors as well. Features unique to mobile processors are 
discussed in the following sections.
SL Technology
SL technology and SL 
architecture are terms that Intel used to describe the first system level 
(SL) power-management improvements that were specially designed for mobile 
processors and later incorporated into all desktop processors. This technology 
was first introduced in the 386SL processor in October 1990 and was the first 
mobile-specific PC processor on the market. The 386SL was based on the 386SX 
core (16-bit data bus), with added power-management features that Intel then 
called SL technology. In November 1992, the 386SL was followed by the 486SL 
processor, which was essentially a 486DX with the same SL technology included in 
the 386SL. At first, the 486SL was a unique model. However, starting in June 
1993, SL technology was available in all desktop 486 processors and all Pentium 
processors from 75MHz and faster. Every Intel x86 processor introduced since 
then, from the Pentium II through the Pentium 4 and beyond, has incorporated SL 
technology.
SL technology consists of a number of processor features that 
operate at the system hardware level, independent of the operating system or 
application software. SL technology includes the following features:
The most important part of SL technology is System Management Mode (SMM), which can 
control and power up/down components without interfering with other system 
resources. SMM software executes in a dedicated memory space called System 
Management RAM (SMRAM), which is invisible to operating system and applications 
software. The CPU enters SMM upon receiving a System Management Interrupt (SMI), 
the highest-priority nonmaskable interrupt that the CPU can receive. When an 
event generates an SMI (for example, accessing a device that is currently 
powered down), the CPU responds by saving the state of the processor to SMRAM. 
The CPU then switches into SMM and executes the SMM code (also stored in the 
SMRAM). When the SMM task is complete (for example, powering on the device that 
was being accessed), the SMI handler executes a Resume (RSM) instruction, which 
restores the former state of the processor from the SMRAM.
I/O Restart is one of the SL technology functions used with System 
Management Mode. For example, if an application executes an I/O instruction that 
tries to access a disk drive that is powered down for battery savings, a System 
Management Interrupt occurs, powering up the drive and re-executing the I/O 
instruction automatically. This is transparent to the operating system and 
application program, allowing the software to run seamlessly.
SL technology also added special clock controls, including Stop 
Clock, AutoHALT, and Auto Idle. Stop Clock is an instruction that allows control 
over the CPU clock frequency. When Stop Clock is enabled, the internal frequency 
of the CPU can be throttled down as low as 0MHz, causing the CPU to consume only 
a few milliamps of power. This is also called sleep mode. For further power 
reductions, the external clock signal can be removed altogether, lowering power 
consumption to the microamp range. This is also called suspend mode.
AutoHALT is an enhancement to the existing HALT instruction and 
is related to Stop Clock. When a HALT instruction is executed (which stops the 
CPU from executing further instructions), the CPU automatically executes the Stop Clock instruction 
and enters sleep mode.
Auto Idle reduces the clock speed of the CPU from normal (clock 
multiplied) speed down to the CPU bus speed whenever the processor is idle 
during memory or I/O operations. For example, when the processor is executing an 
I/O instruction and waiting for the device to respond, the processor speed is 
automatically reduced to match the CPU bus speed, resulting in power savings without affecting 
overall performance.
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